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[Paper Review] The Load Slice Core Microarchitecture
Motivation Microprocessor core는 Instruction Level Parallelism (ILP)를 올리기 위해 in-order pipeline에서 superscalar out-of-order pipeline으로 진화해왔으며, side-effect로 memory Level Parallelism (MLP) 또한 높여왔다. 참고: Memory-level parallelism (MLP) is a term in computer architecture referring to the ability…